| 摘要: |
| 相控阵雷达是由多个不同功能的分系统组成，各分系统之间必须按照一定的时序协同工作，因此时序控制装置是相控阵雷达系统的重要组成部分。针对相控阵雷达波束扫描快、波束指向灵活和波束驻留时间变化大的需求，提出了一种雷达时序控制装置的设计方法，该方法采用CPCI+FPGA的系统架构，采用参数化、可编程的时序设计方式、具备灵活多样的时序输出接口、支持CPCI总线交换技术，具有完善的自我测试能力。经实际雷达工程验证该装置具有良好的通用性和较强的扩展能力。 |
| 关键词: 时序控制 CPCI总线 波束调度 测试性设计 接口设计 |
| DOI：DOI:10.3969/j.issn.1672-2337.2019.06.012 |
| 分类号:TN957；TN958.92 |
| 基金项目: |
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| Design of a Time Sequence Control Device in Phased Array Radar |
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SUN Gaojun
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1.The 38th Research Institute of China Electronics Technology Group Corporation，Hefei 230088，China;2.Key Laboratory of Aperture Array and Space Application，Hefei 230088，China
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| Abstract: |
| Phased array radar is composed of many subsystems with different functions. To make these subsystems work together properly，time sequence coordination must be needed. So time sequence control device plays an important role in the phased array radar system. According to the phased array radars demands of faster beam scanning，flexible beam pointing，and large variation of beam dwell time，a design method of time sequence control device based on CPCI bus and FPGA is introduced. The device adopts parametric and programmable design. It possesses flexible and various time sequence output interfaces. The device also supports switching technique via CPCI bus and has good self test ability. It is shown that the device has good universality and easy expansion. |
| Key words: time sequence control CPCI bus beam scheduling design for testability interface design |
